Barrelfish
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Macros | |
#define | FLASH_BASE_ADDR 0x00000000 |
#define | FIDO_CLOCK_FREQUENCY (66 * (1000 * 1000)) |
#define | FIDO_MEM_OFFSET 0x01000000 |
#define | FIDO_SRAM_BASE_ADDR (0x00000000 + FIDO_MEM_OFFSET) |
#define | FIDO_CACHE_BASE_ADDR (0x00080000 + FIDO_MEM_OFFSET) |
Typedefs | |
typedef unsigned long volatile | FIDO_Register_t |
#define FIDO_CACHE_BASE_ADDR (0x00080000 + FIDO_MEM_OFFSET) |
Onchip relocatable cache RAM
#define FIDO_CLOCK_FREQUENCY (66 * (1000 * 1000)) |
System clock frequency
#define FIDO_MEM_OFFSET 0x01000000 |
Memory offset register value loaded during crt0. This offset applies to the onchip SRAM, cache, and frame buffer memories and all memory-mapped registers and cannot conflict with any external memory regions.
#define FIDO_SRAM_BASE_ADDR (0x00000000 + FIDO_MEM_OFFSET) |
Onchip SRAM
#define FLASH_BASE_ADDR 0x00000000 |
External memory base addresses controlled by chip selects 0,1, and 2. Specify -1 for any absent memories. The defaults are for the Innovasic development board.
typedef unsigned long volatile FIDO_Register_t |
Memory-mapped registers