Barrelfish
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X86 inline asm utilities and defines. More...
Macros | |
#define | MSR_IA32_EFER 0xc0000080 |
Extended features enables. | |
#define | MSR_IA32_STAR 0xc0000081 |
System call segment selectors MSR. | |
#define | MSR_IA32_LSTAR 0xc0000082 |
System call target address MSR. | |
#define | MSR_IA32_FMASK 0xc0000084 |
System call flag mask MSR. | |
#define | MSR_IA32_FSBASE 0xc0000100 |
64-bit FS base register | |
#define | MSR_IA32_GSBASE 0xc0000101 |
64-bit GS base register | |
#define | MSR_AMD_HWCR 0xc0010015 |
AMD hardware configuration. | |
#define | MSR_AMD_VMCR 0xc0010114 |
Global aspects of SVM. | |
#define | MSR_AMD_VM_HSAVE 0xc0010117 |
Physical address of host save area. | |
#define | IA32_EFER_SCE (1 << 0) |
Fast system call enable. | |
#define | IA32_EFER_LME (1 << 8) |
Long mode enable. | |
#define | IA32_EFER_LMA (1 << 10) |
Long mode active. | |
#define | IA32_EFER_NXE (1 << 11) |
No execute enable. | |
#define | IA32_EFER_SVME (1 << 12) |
Switch to enable/disable SVM. | |
#define | AMD_HWCR_FFDIS (1 << 6) |
TLB flush filter. | |
#define | AMD_VMCR_SVMDIS (1 << 4) |
SVM disabled indicator. | |
Functions | |
bool | has_monitor_mwait (void) |
Detects monitor/mwait support. More... | |
void | monitor_mwait (lvaddr_t base, uint64_t lastval, uint32_t extensions, uint32_t hints) |
Use MONITOR/MWAIT to block until a given word changes. More... | |
X86 inline asm utilities and defines.
bool has_monitor_mwait | ( | void | ) |
Detects monitor/mwait support.
true | monitor/mwait is supported on this core |
false | monitor/mwait is not supported on this core |
void monitor_mwait | ( | lvaddr_t | base, |
uint64_t | lastval, | ||
uint32_t | extensions, | ||
uint32_t | hints | ||
) |
Use MONITOR/MWAIT to block until a given word changes.
base | Virtual address of 64-bit word to monitor |
lastval | Previous value of word |
extensions | Processor-specific extensions (zero for defaults) |
hints | Processor-specific hints (zero for defaults) |
Returns when the 64-bit word at base is not equal to lastval.