Barrelfish
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Architecture specific kernel page table definitions. More...
Macros | |
#define | X86_64_MEM_PAGE_SIZE X86_64_LARGE_PAGE_SIZE |
#define | X86_64_MEM_PAGE_MASK 0x1fffff |
#define | X86_64_PDPT_ENTRIES(limit) (X86_64_PML4_BASE((limit) - 1) + 1) |
#define | X86_64_PDIR_ENTRIES(limit) (X86_64_PDPT_BASE((limit) - 1) + 1) |
#define | X86_64_PTABLE_ENTRIES(limit) (X86_64_PDIR_BASE((limit) - 1) + 1) |
Architecture specific kernel page table definitions.
#define X86_64_MEM_PAGE_MASK 0x1fffff |
Mask for physical memory page
#define X86_64_MEM_PAGE_SIZE X86_64_LARGE_PAGE_SIZE |
Physical memory page size is 2 MBytes
#define X86_64_PDIR_ENTRIES | ( | limit | ) | (X86_64_PDPT_BASE((limit) - 1) + 1) |
Resolves to required number of entries in page directory to map 'limit' number of bytes.
#define X86_64_PDPT_ENTRIES | ( | limit | ) | (X86_64_PML4_BASE((limit) - 1) + 1) |
Resolves to required number of entries in page directory pointer table to map 'limit' number of bytes.
#define X86_64_PTABLE_ENTRIES | ( | limit | ) | (X86_64_PDIR_BASE((limit) - 1) + 1) |
Resolves to required number of entries in page table to map 'limit' number of bytes.