Barrelfish
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x86-64 kernel page-table structures. More...
Data Structures | |
union | x86_64_pdir_entry |
union | x86_64_ptable_entry |
Macros | |
#define | X86_64_PTABLE_ACCESS_MASK |
All flags valid for page access protection from user-space. | |
#define | X86_64_PTABLE_FLAGS_MASK |
All arch-specific flags valid to be set from user-space. | |
#define | X86_64_PTABLE_FLAGS(flags) (flags & X86_64_PTABLE_FLAGS_MASK) |
Mask out all arch-specific flags except those valid from user-space. | |
#define | X86_64_PTABLE_ACCESS(flags) (flags & X86_64_PTABLE_ACCESS_MASK) |
Mask out all flags except those for access protection. | |
#define | X86_64_IS_PRESENT(entry) ((*(uint64_t *)(entry)) & X86_64_PTABLE_PRESENT) |
Functions | |
void | paging_x86_64_reset (void) |
Reset kernel paging. More... | |
void | paging_x86_64_make_good_pml4 (lpaddr_t base) |
Make a "good" PML4 table out of a page table. More... | |
x86-64 kernel page-table structures.
#define X86_64_IS_PRESENT | ( | entry | ) | ((*(uint64_t *)(entry)) & X86_64_PTABLE_PRESENT) |
True if page entry is present in memory
void paging_x86_64_make_good_pml4 | ( | lpaddr_t | base | ) |
Make a "good" PML4 table out of a page table.
A "good" PML4 table is one that has all physical address space and the kernel mapped in. This function modifies the passed PML4, based at physical address 'base' accordingly. It does this by taking out the corresponding entries of the kernel's pristine PML4 table.
base | Physical base address of PML4 table to make "good". |
void paging_x86_64_reset | ( | void | ) |
Reset kernel paging.
This function resets the page maps for kernel and memory-space. It clears out all other mappings. Use this only at system bootup!